ADIN1200CCP32Z-R7

Analog Devices
584-ADIN1200CCP32Z-R
ADIN1200CCP32Z-R7

Mfr.:

Description:
Ethernet ICs Industrial Ethernet 10 100 PHY

Datasheet:
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In Stock: 2,669

Stock:
2,669 Can Dispatch Immediately
Factory Lead Time:
10 Weeks Estimated factory production time for quantities greater than shown.
Minimum: 1   Multiples: 1
Unit Price:
€-.--
Ext. Price:
€-.--
Est. Tariff:
Packaging:
Full Reel (Order in multiples of 1500)

Pricing (EUR)

Qty. Unit Price
Ext. Price
Cut Tape / MouseReel™ †
€3.75 €3.75
€2.85 €28.50
€2.61 €65.25
€2.36 €236.00
€2.27 €567.50
€2.17 €1,085.00
€2.02 €2,020.00
Full Reel (Order in multiples of 1500)
€2.01 €3,015.00
€1.96 €5,880.00
† A MouseReel™ fee of €5.00 will be added and calculated in your basket. All MouseReel™ orders are non-cancellable and non-returnable. ↩

Alternative Packaging

Mfr. Part No.:
ADIN1200CCP32Z
Packaging:
Tray
Availability:
In Stock
Price:
€3.75
Min:
1

Similar Product

Analog Devices ADIN1200CCP32Z
Analog Devices
Ethernet ICs Industrial Ethernet 10 100 PHY
Compare With Current Part

Product Attribute Attribute Value Select Attribute
Analog Devices Inc.
Product Category: Ethernet ICs
RoHS:  
SMD/SMT
Ethernet PHYs
10BASE-TE, 100BASE-TX
1 Transceiver
10 Mb/s, 100 Mb/s
MII, RGMII, RMII
3.3 V
- 40 C
+ 105 C
Reel
Cut Tape
MouseReel
Brand: Analog Devices
Country of Assembly: Not Available
Country of Diffusion: Not Available
Country of Origin: CN
Moisture Sensitive: Yes
Product Type: Ethernet ICs
Factory Pack Quantity: 1500
Subcategory: Communication & Networking ICs
Products found:
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Attributes selected: 0

Datasheet

PCN

CNHTS:
8542399000
CAHTS:
8542390000
USHTS:
8542390090
MXHTS:
8542399999
ECCN:
5A991.b

ADIN1200 Industrial Ethernet PHY

Analog Devices Inc. ADIN1200 10/100 Industrial Ethernet PHY is a low-power, robust, single-port 10/100 Ethernet transceiver with industry-leading latency specifications primarily designed for industrial Ethernet applications. This design integrates an Energy-Efficient Ethernet PHY core plus all of the associated common analogue circuitry, input and output clock buffering, the management interface and subsystem registers, as well as the MAC interface and control logic to manage the reset and clock control and pin configuration.

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