LMK1D2104RHDR

Texas Instruments
595-LMK1D2104RHDR
LMK1D2104RHDR

Mfr.:

Description:
Clock Buffer Dual bank 4-channel output 1.8-V 2.5-V L LMK1D2104RHDT

Datasheet:
ECAD Model:
Download the free Library Loader to convert this file for your ECAD Tool. Learn more about the ECAD Model.
More Information
Learn more about Texas Instruments LMK1D2104RHDR

In Stock: 2,742

Stock:
2,742 Can Dispatch Immediately
Factory Lead Time:
6 Weeks Estimated factory production time for quantities greater than shown.
Minimum: 1   Multiples: 1
Unit Price:
€-.--
Ext. Price:
€-.--
Est. Tariff:
Packaging:
Full Reel (Order in multiples of 3000)

Pricing (EUR)

Qty. Unit Price
Ext. Price
Cut Tape / MouseReel™ †
€9.50 €9.50
€7.43 €74.30
€6.91 €172.75
€6.35 €635.00
€6.08 €1,520.00
€5.92 €2,960.00
€5.79 €5,790.00
Full Reel (Order in multiples of 3000)
€5.62 €16,860.00
† A MouseReel™ fee of €5.00 will be added and calculated in your basket. All MouseReel™ orders are non-cancellable and non-returnable. ↩

Product Attribute Attribute Value Select Attribute
Texas Instruments
Product Category: Clock Buffer
RoHS:  
8 Output
575 ps
Differential
VQFN-28
3-State
2 GHz
1.71 V
3.465 V
LMK1D2104
- 40 C
+ 105 C
Brand: Texas Instruments
Country of Assembly: CN
Country of Diffusion: DE
Country of Origin: CN
Duty Cycle - Max: 55 %
Moisture Sensitive: Yes
Mounting Style: SMD/SMT
Operating Supply Current: 55 mA
Packaging: Reel
Packaging: Cut Tape
Packaging: MouseReel
Product: Clock Buffers
Product Type: Clock Buffers
Factory Pack Quantity: 3000
Subcategory: Clock & Timer ICs
Type: LVDS Buffer
Products found:
To show similar products, select at least one checkbox
Select at least one checkbox above to show similar products in this category.
Attributes selected: 0

Datasheet

This functionality requires JavaScript to be enabled.

CNHTS:
8542399000
CAHTS:
8542390000
USHTS:
8542390090
MXHTS:
8542399999
ECCN:
EAR99

LMK1D210x Low Additive Jitter LVDS Buffer

Texas Instruments LMK1D210x Low Additive Jitter LVDS Buffer distributes two clock inputs (IN0 and IN1) to a total of up to 8 pairs of differential LVDS clock outputs (OUT0, OUT7) with minimum skew for clock distribution. Each buffer block consists of one input and up to 4 LVDS outputs. The inputs can be LVDS, LVPECL, HCSL, CML, or LVCMOS. The LMK1D210x is specifically designed for driving 50Ω transmission lines. In the case of driving the inputs in single-ended mode, the appropriate bias voltage must be applied to the unused negative input pin.

An unexpected error has occurred.


Have a question? Please visit the Help Centre.
For questions about a specific order, please log in to your account.

If you encounter further problems, please contact us on 800-346-6873 or email help@mouser.com.